Broadcom 16nm 100GbE PAM-4 PHY (4:2) or (2:2) - BCM81128A0KRFBG
The Broadcom BCM81128 is a single-chip, low-power, low-latency PAM-4 PHY that integrates retimer and equalizer functions to support 100GbE applications. In 100GbE mode, the BCM81128 retimes, adds FEC (optional), and equalizes 4 x 25G NRZ or 2 × 50G PAM-4 host-side signals into 2 × 50G PAM-4 line-side signals, which drive optical PAM-4 links inside next-generation modules, including QSFP28. The BCM81128 also provides 1 × 100G applications with a single 100G PCS stream. The device also supports KP4 FEC, FEC bypass capability, and Broadcom's proprietary high gain Super-FEC (S-FEC) for extended reach applications. The BCM81128 is compliant to IEEE standards with KP4 FEC and FEC bypass capability. On-chip clock synthesis is performed by a low-cost 156.25 MHz reference clock via high-frequency, low jitter phase-locked loops (PLLs). The BCM81128 is fabricated in advanced low-power 16 nm CMOS technology and is available in a RoHS-compliant package.
Features
- 100GbE (2 × 50G) PAM-4 PHY
- Host side: 4 × 25G NRZ or 2 × 50G PAM-4
- Line side: 2 × 50G PAM-4
- Supports an independent 100G PCS stream
- Proprietary high gain Super-FEC (S-FEC)
- CEI-28G/56G MR compliant
- Integrated host side AC-coupling caps
- Line-side and client-side loopbacks
- Supports reaches for MMF/SMF fiber links
- Low-power 16 nm CMOS design
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